1. Field of the Invention
The present invention relates to a coater/developer that coats a resist film on a substrate such as a semiconductor wafer, an LCD wafer (glass wafer for an Liquid Crystal Display) and develops the exposed resist film, a method of coating and developing the resist film, and a computer readable storing medium that stores a program for allowing the coater/developer to carry out the method of coating and developing the resist film.
2. Description of the Related Art
In a fabrication process of a semiconductor device or a flat panel display (FPD), photolithography is indispensable in order to form a predetermined resist pattern on a substrate. The photolithography includes a series of processes of coating resist solution in order to form a resist film on the substrate such as a semiconductor wafer (referred to as a wafer below), exposing the resist film with exposure light through a photomask, and developing the resist film. Such processes are generally carried out in a resist pattern forming apparatus having a coater/developer for forming the resist film and developing the resist film after the exposure and an exposure apparatus connected to the coater/developer.
An example of the resist pattern forming apparatus has been proposed in, for example, Patent-related Document 1. In this apparatus, wafer carriers 10 containing plural wafers W are placed on a carrier stage 11 of a carrier block 1A as shown in FIG. 1 and the wafer W in the wafer carriers 10 is delivered to a process block 1B by a transfer arm 12. After a resist solution is coated on the wafer W in order to form the resist film at a coating module 13A in the process block 1B, the wafer W with the resist film formed on the upper surface is transferred to an exposure apparatus 1D via an interface block 1C, and the wafer W undergoes an exposure process. Then, the wafer W is returned to the process block 1B and undergoes a developing process in a developing module 13B. Finally, the wafer W returns to the original wafer carrier 10.
Before and after the resist solution coating process and the developing process, wafer temperature control in a temperature control module, a wafer heating process in a heating module, and a wafer cooling process in a cooling module are carried out. The temperature control module, the heating module, and the cooling module are arranged one above another in shelf modules 14 (14a through 14c). The wafer W is transferred between places where the wafer W can be placed in the process block 1B such as the coating module 13A, the developing module 13B and the shelf modules 14A through 14C by two transfer units 15A, 15B provided in the process block 1B.
When the resist film is formed on the wafers W by various processes mentioned above, each of the wafers W to be processed is transferred by the transfer units 15A and 15B in accordance with a transfer schedule that determines the wafer W is to be transferred to a predetermined module at a predetermined timing as described in Patent-related Document 1. The transfer units 15A, 15B include two or more arms in order to hold the wafer W. The way that the wafer W is transferred by the transfer units 15A, 15B is explained as follows. The transfer unit 15A (15B) receives with an arm A1 a wafer W1, which is processed in one module M1, from the module M1, and delivers with an arm A2 a wafer W2, which is to be processed after the wafer W1, to the module M1. Then, the transfer unit 15A receives with the arm A2 a wafer W0, which is processed before the wafer W1, from a module M0, which is located downstream of the series of the process modules, and delivers with the arm A1 the wafer W1 to the module M0.
While various modules such as the coating module, the developing module and the like are mounted in the coater/developer, the number of the incorporated modules is different depending on a type of the modules. For example, the coater/developer may have three of the coating modules, three of the developing modules, and nine of the heating modules for use in heating the wafer W having the resist solution coated. In addition, the coater/developer may have three anti-reflection film forming modules. However, all the modules mounted in the coater/developer are not used in every process. Namely, the modules to be used in a particular process and the number of the modules are specified by an operator of the coater/developer when the process is carried out.
Specifically, serial numbers are given to all the modules mounted in the related art coater/developer, and the operator produces a transfer flow that determines a transfer route of the wafer W by specifying the respective serial numbers given to the corresponding modules in accordance with the order of the modules to be used. In addition, the operator selects a process recipe in each of the modules. As a result, the transfer schedule is produced. In this case, the number of the modules of the same type to be used is determined based on his or her experience.
When the wafer W is transferred in accordance with the transfer schedule, a cycle time required to carry out one cycle of the transfer schedule is determined. The cycle time is generally determined as a limiting time to be the longest one of necessary transfer cycle times. The necessary transfer cycle time is obtained for each type of module for carrying out a same process by dividing a necessary staying time from when the wafer W is transferred to a module by the transfer unit 15A (15B) until when the wafer W is ready to be transferred from the module by the transfer unit 15A (15B) after the process is finished in the module by the number of the modules for the same process. Because the necessary transfer cycle time is usually longer than a time period required for the transfer unit 15A (15B) to successively deliver the wafer W to all the accessible modules in the process block 1B, the limiting time is determined to be the longest necessary transfer cycle time among others, as stated above.
For example, when it is assumed that the coater/developer has three coating modules whose necessary staying time is 60 seconds and nine heating modules to be used for pre-baking whose necessary staying time is 90 seconds, the necessary transfer cycle times for the coating and for the pre-baking processes are 20 seconds (=60/3) and 10 seconds (=90/9), respectively. In this case, a cycle limiting time is the necessary transfer cycle time for the coating process, which is longer than the necessary transfer cycle time for the pre-baking process.
On the other hand, only six of the nine heating modules (LHP) are necessary for the following reasons. When a first wafer W1 is delivered to a first heating module LHP1 and then a second wafer W2 is delivered to a second heating module LHP2, the remaining time for the first wafer W1 to be heated in the first heating module LHP1 is 70 seconds. When a third wafer W3 is delivered to a third heating module LHP3, the remaining time for the first wafer W1 is 50 seconds. When a fourth wafer W4 is delivered to a fourth heating module LHP4, the remaining time for the first wafer W1 is 30 seconds. When a fifth wafer W5 is delivered to a fifth heating module LHP5, the remaining time for the first wafer W1 is 10 seconds. Then, a sixth wafer W6 is delivered to the first heating module LHP1 rather than a sixth heating module LHP6. This is because the heating process for the first wafer W1 is finished by then and the wafer W1 is transferred out from the first heating module LHP1, leaving the first heating module LHP1 ready for the sixth wafer W6.
Therefore, even when the operator selects nine heating modules, only six heating modules are used and the remaining three heating modules continue to be in an idle state. This situation takes place quite often because the number of modules to be used is determined in accordance with the operator's experience, as stated above.
What is worse in this situation is that all the nine heating modules start to be heated to 90° C. through 130° C. when selected by the operator, which leads to a waste of electricity, an increased running cost and thus an increased fabrication cost.
The inventors of the present invention are trying to reduce the waste of electricity and the running cost, which may be caused from the fact that temperature control is carried out in, for example, the heating modules that are not planned to be used. Patent-related Document 1 fails to disclose or suggest a way of reducing the waste of electricity and the running cost.
Patent-related Document 1: Japanese Patent Application Laid-Open Publication No. 2004-193597.